通過條件成 績 ：60 分
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52030_1EIEE2151030
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Note01_ch01_導論
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Note02_ch02_積體電路製程介紹
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Note03_HW01
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Note04_ch03_半導體基礎
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Note05_TXL_Smith_Chart
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Note06_return-loss-to-vswr
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Note07_HW02
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Note08_法治素養測驗
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Note09_module18
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Note10_module14
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Note11_module19
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Note12_module20
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Note13_Full_Custom_IC_Design
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Note14_CMOS_IC_CH02
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Note15_T18HVG2_2019_01
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Note16_Lab01_Setup_DC1
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Note17_EDACloud_v7_0
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Note18_EDACloud_FC_v4_9
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Note19_EDACloud_RF_v5_3
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Note20_Lab01_報告格式
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Note21_HW02_檢討
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Note22_Lab02_ft_fmax
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Note23_power_gain
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Note24_ft_fmax_derivation
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Note25_Lab02_報告格式
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Note26_Lab03_Loadpull
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Note27_Load-pull_analysis_optimizing
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Note28_Lab04_Loadpull2
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Note29_Lab05_PA_parameters1
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Note30_Lab05_PA參數_V2
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Note31_Lab06_Final_project_V2
- 課程介紹
- 課程安排
- 評論
